Document Title: [GalagaMap.html (html file)]

Galaga memory map, partial, probably wrong in places, but it is a start.

Galaga memory map  
-----------------

V1.0 Nov1/96 'board squirrel'

Galaga is a multi processor architecture machine. The
processor board is a subset of the Bosconian processor board.
In fact a bosconian CPU will run the Galaga code.
A galaga video board is required though.

Processor 1
-----------
 Z80A , clocked at 1H. Board position 4M. Uses 4, 2732 eproms
these are mapped at 0000-3FFF sequentially 3N(gg-a),3M(gg-b),
3L(gg-c),3K(gg-d).
It uses a sync bus controller (08xx) at 2J to access common
system areas. It uses IRQ1, and NMI1. 
The source of NMI1 appears to be the unknown device at 2L(06xx)

Processor 2
-----------
Z80 , clocked at 1H, board position 4J. Uses 1  2732 eprom 3J(gg-e) 
mapped at 0000-0FFF. It uses a sync bus controller (08XX) at 2J
to access common system areas.
It uses IRQ2, and NMI2. The source of NMI2 is the 50
way edge connector to the video board, but the video board does
not appear to use it.

Stack area 9100, accesses video bus D, and the A ram at least.

Processor 3
-----------
 Z80 , clocked at 1H, the horizontal dot clock frequency
Board position 4E. Uses a single  eprom (2732) at
position 3E(gg-g). This is mapped at 0000-0FFF. It uses 
a Z80 sync bus conrtoller chip(08xx) at 2E to access
common sytem areas. It uses NMI3 and IRQ3. The source of
NMI3 is the clock generator IC(07xx) at 4D, but it is enabled by
the !NMION signal.

It seems to access video ram in the video bus 'D'area.
Stack area is 9B00

COMMON SYSTEM AREA
------------------
IC 2P,1P do most of the decoding on the cpu board.

2P   AA AAA
    C11 111
    K54 321
    001 101   -> !I/O       i.e 6800-6FFF
    001 110   -> enable 1P

1P  EE+ RAA
    NN5 W54
    001 000   -> A6 PROM 5C, sound related  6800+
    001 001   -> WE ram 2B(7489) , sound related.
    001 010   -> select register 3C, system control
                 bottom 3 address bits select which bit.
    001 011   -> !WDR watchdog reset, must be held each vblank.
    001 100   -> read dip switches. A 2 bit read, of 16 switches
                 selected by bottom 3 address bits.
ADDRESS SUMMARY
---------------
 
   AAAA AA
   1111 11AA AAAA AAAA  R
   5432 1098 7654 3210  W
  +----+----+----+----+
   0111 0xxx xxxx xxxx  X I/O -> IC 2L coin,control,background sound
   0110 1xxx xx00 xxxx  W A6 prom5C 
   0110 1xxx xx01 xxxx  W 2B 7489 write
   0110 1xxx xx10 x000  W d0 clr IRQ1
   0110 1xxx xx10 x001  W d0 clr IRQ2
   0110 1xxx xx10 x010  W !NMION
   0110 1xxx xx10 x011  W !RESET
   0110 1xxx xx10 x100  W MOD0 use unknowm
   0110 1xxx xx10 x101  W MOD1 use unknown
   0110 1xxx xx10 x111  W MOD2 use unknown
   0110 1xxx xx11 xxxx  W !WDR watchdog reset.
   0110 1xxx xx00 x000  R Dip sw read (d0=6k sw0,d1=6j sw0)
   0110 1xxx xx00 x001  R Dip sw read (d0=6k sw1,d1=6j sw1)
   0110 1xxx xx00 x010  R Dip sw read (d0=6k sw2,d1=6j sw2)
   0110 1xxx xx00 x011  R Dip sw read (d0=6k sw3,d1=6j sw3)          
   0110 1xxx xx00 x100  R Dip sw read (d0=6k sw4,d1=6j sw4)
   0110 1xxx xx00 x101  R Dip sw read (d0=6k sw5,d1=6j sw5) 
   0110 1xxx xx00 x110  R Dip sw read (d0=6k sw6,d1=6j sw6)
   0110 1xxx xx00 x111  R Dip sw read (d0=6k sw7,d1=6j sw7)

NOTE the IO circuitry contains 2 custom chips, one of which is
suspected to be a custom z80 processor. No investigation
at this point.

VIDEO BOARD
-----------
IC 1E does most of the CPU related adress decoding on the 
video board.

  CAA AAA
  K11 111
   45 321
  010 000  -> !RAM, IC 2K, RAM IC 1K, TMM2016 , 2K*8 bus "A"
  010 001  -> IC2F, RAM 3F,3E, Data bus "D"
  010 010  -> IC2J, RAM 3L,3K, Data bus "B"
  010 011  -> IC2H, RAM 3J,3H, Data bus "C"
  010 100  -> !port-> ic 5K


IC 04xx decodes some other addresses maybe ?
 
DECODE SUMMARY
--------------
  AAAA AA
  1111 11AA AAAA AAAA
  5432 1098 7654 3210
  1000 0xxx xxxx xxxx 8000-87FF "A" RAM
  1000 1-xx xxxx xxxx 8800-8BFF "D" RAM
                      8C00 8FFF "D" RAM mirror
  1001 0-xx xxxx xxxx 9000 93FF "B" RAM
                      9400 97FF "B" RAM mirror
  1001 1-xx xxxx xxxx 9800 9BFF "C" RAM 
                      9C00 9FFF "C" RAM mirror 
  1010 0xxx xxxx x000 A000 D0 sets IC5 bit0
  1010 0xxx xxxx x001 A001 D0 sets IC5 bit1
  1010 0xxx xxxx x010 A002 D0 sets IC5 bit2
  1010 0xxx xxxx x011 A003 D0 sets IC5 bit3
  1010 0xxx xxxx x100 A004 D0 sets IC5 bit4
  1010 0xxx xxxx x101 A005 D0 sets IC5 bit5
  1010 0xxx xxxx x110 A006 D0 sets IC5 bit6
  1010 0xxx xxxx x111 A007 D0 sets FLIP  
  
VIDEO ROM DECODING
------------------

ROM4L (gg-J) is USED by RAM "A" 

Suspect this is the character ROM